Helion: A High-level DSL for Kernel Authoring
summary
A Python-embedded DSL that compiles to Triton, Helion exposes a single critical construct hl.tile tiling construct and maps inner tile bodies to device kernels while keeping host code as normal PyTorch. An embedded autotuner runs about 20 minutes to search 1,200 candidates using pattern search and differential evolution, starting with 100 random configs and hill-climbing the top five. It autotunes indexing modes, tile sizes, loop flattening, reduction rolling and TMAs, produces reusable configs for deployment, and generates Triton kernels that often beat handwritten Triton across NVIDIA, AMD, Intel and Meta accelerators.
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chapters (8)
- 0:00Helion introduction
- 1:05Helion as PyTorch with tiles
- 3:36Autotuner configuration space
- 8:57Autotuner design and algorithms
- 10:24Deploying Helion with AOT autotuning
- 13:37Performance case studies
- 18:49Helion compiler internals
- 20:55Q&A
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