PQC in Action: From Global Standards to Secure Deployments
summary
Global standards map to working deployments: hardware security modules with a provided HSM simulator and PKCS#11 integrations run PQC algorithms (XMSS/LMS, MLDDSA, Falcon, HQC) for chip identity and firmware signing at scale (millions of devices); customers deploy pure PQC on greenfield projects and hybrids for protocols. CAVP and interoperability testing is mandatory, IP cores for FPGA/ASIC accelerate performance, and timelines align to 2030/2035; survey data shows ~50% start in 1–3 years and ~66% plan hybrid approaches.
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chapters (17)
- 0:00PQC conference intro
- 1:03PQC in action transition
- 3:12UTMCO’s PQC journey
- 4:38NIST PQC standards
- 6:46Crypto agility migration
- 8:32Global PQC bodies
- 10:16Regional PQC adoption
- 12:04Hybrid vs pure PQC
- 14:10PQC migration tools
- 17:17PQC readiness ingredients
- 20:28HSM in PQC deployments
- 23:41PQC in chip manufacturing
- 24:45PQC for satellites
- 25:48PQC in networking/firmware
- 26:54PQC project learnings
- 30:27Expert PQC feedback
- 31:31Q&A on HSM standards
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