Why go RISC-V-y?
summary
RISC-V is a free open ISA you can implement on FPGAs today and later turn into an ASIC; common cores include DarkRISCV and commercial chips from SiFive and Western Digital (WD uses RISC-V in its drives). People prototype accelerators on FPGA, integrate a RISC-V core with custom hardware, and ship devices—one reported audio product matches equipment costing tens of thousands of dollars. Older process nodes make small ASIC runs feasible for thousands.
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chapters (20)
- 0:00Intro
- 0:48Who am I
- 1:52Objectives
- 2:41Why RISCVy
- 3:22Definitions
- 6:46What is an instruction set architecture
- 8:13Popular architectures
- 9:07RISC vs RISCV
- 12:10Why RISCV
- 13:27What is RISCV
- 14:44RISCV specifications
- 17:21RISCVy implementations
- 17:44FPGA implementations
- 21:16Design your own
- 25:01Security
- 27:25Random facts
- 28:23Design limits
- 29:37Predictions
- 30:43Apple
- 31:36Questions
