Sponsor Talk – Haydn Nelson
summary
UHD 4.0 lands with a reworked RFNoC and host stack: configurable RFNoC port widths (up to 512 bits) and RFNoC configurable ports let per‑channel bandwidth scale past 250 MS/s, a static routing path removes crossbar buffering and reduces FPGA logic and latency, and separate data/control paths enable tighter control loops. Host streaming rewrites use DPDK host streaming to hit full‑rate on X300/310/N320/M320 families. Test coverage, integrated FPGA repo, DC‑spur fixes and a power‑calibration utility improve stability.
AI-written summary · about
chapters (10)
- 0:00Start
- 3:57Aaron Rosetto
- 6:24New Radio Workshops
- 6:37Gnu Radio Workshops
- 9:39Uhd 4 0
- 12:02Rfnoc
- 15:40Static Routing
- 17:44Data Paths and the Control Paths
- 25:40Michael West
- 26:58Challenges
related talks
24mUHD Four-O
24mMeet the Family: RFNoC Blocks in UHD
31mNI: New Capabilities for Comms, Radar, & EW with an SDR-based Research Platform
28mAdventures in RFNoC: Lessons Learned From Developing a Real-Time Spectrum Sensing Block
30mZXDH DPU Adapter and It's Application
22mData transport in a radio telescope: Remote Direct Memory Access over Ethernet from FPGA to GPU
16mSoftware-driven Hardware in the Data Center: LibreBMC, Renode, RowHammer...
59mDramatically Accelerate 96Board Software via an FPGA with Integrated Processors
