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Stephen Chong

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Making Formulog Fast: An Argument for Unconventional Datalog EvaluationOOPSLA 20242024-10-20
Compiles Formulog to Soufflé and replaces semi-naive batching with eager evaluation, a concurrent work stealing DFS that specializes rules on novel facts and…
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Care and Feeding of AdvisorsPLMW @ POPL 20232023-01-17
Covers concrete signs to pick or switch advisors: check tenure clock and recent papers, ask current and former students about graduation times and placements…
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From SMT to ASP: Solver-Based Approaches to Solving Datalog Synthesis-as-Rule-Se...POPL 20232023-01-15
Presents a progression of four solver implementations — prosynth, monosynth, loopsynth, and ASPsynth — that move from CEGIS with provenance to a custom…
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Fast Incremental PEG ParsingSLE 20212021-10-17
Presents an incremental PEG parser implementation called GPeg with a syntax-highlighting library Flare and a prototype editor, claiming typical reparses are…
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Assuage: Assembly Synthesis Using A Guided ExplorationUIST 20212021-10-10
Assuage is a parallel interactive assembly synthesizer built on CEGIS that lets users run multiple guided searches as parallel synthesis instances with…
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Formulog: Datalog for SMT-Based Static AnalysisOOPSLA 20202020-11-15
Formulog is a DSL that combines Datalog, an ML-like term fragment, and SMT solving and a prototype runtime implements it. The authors implement three analyses…
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