Mike Thompson
where else to find them
no profile links on file
what they talk about
all 6 in the filters
where they keep going back
- RISC-V Summit2 editions2019–2022
all 4 in the filters
on a stage with
- Ann Mutschleronce
- Dave Kelfonce
- Emerson Hsiaoonce
all 6 in the filters
who talks about the same things
- Vadzim Kavalkou4 talks
- Melissa McKay25 talks
- Sergei Chernov3 talks
- Tom Hombergs4 talks
- Laurentiu Marinescu2 talks
- Joris Kuipers10 talks
| title | conference | date |
|---|---|---|
| RISC-V in Space (The Canadian version) | Latch-Up 2026 | 2026-05-01 |
An open-source RISC-V microcontroller is fabricated into silicon, radiation-hardened with a University of Saskatchewan process tweak that keeps cell geometry… | ||
| Securing your AWS environment with automated DSPM | AWS re:Inforce 2024 | 2024-06-10 |
Varonis shows an automated DSPM workflow that inventories all sensitive data across AWS and SaaS, ties it to permissions and CloudTrail activity, and raises… | ||
| Deploy new workloads efficiently without additional investments | AWS re:Invent 2023 | 2023-11-27 |
Cloud instances built on AMD EPYC Genoa claim up to 2x runtime versus comparable x86 and deliver 10–50% cost savings depending on workload; Redis benchmarks… | ||
| Building a Global CORE-V Cores Ecosystem | RISC-V Summit 2022 | 2022-12-13 |
OpenHW publishes RTL, UVM testbenches and coverage reports on GitHub and claims industrial-grade verification using SystemVerilog, UVM and formal methods; the… | ||
| RISC-V Open ISA’s Shock Wave of Processor Innovation Causing Seismic Shift | RISC-V Summit 2019 | 2019-12-09 |
Open RISC‑V implementations drive extensibility that raises verification from compliance checks into full system and security validation: designers report… | ||
| nothing matches | ||