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Ken Dockser

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The RISC-V Vector Cryptographic Extensions in the Real WorldRISC-V Summit North America 20232023-11-06
RISC‑V Vector Crypto Extensions add concrete primitives for AES, GHASH, SHA‑256/512, SM3/SM4 and associated bit ops; designs target single instruction per AES…
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The RISC-V Vector Cryptography ExtensionsRISC-V Summit 20222022-12-13
RISC‑V adds a set of optional Vector Cryptography Extensions that define concrete instructions for AES, GHASH, SHA‑2, SM3, and SM4 and for bit-manipulation to…
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RISC V Bit Manipulation ISA Extension Spec, Hardware, SoftwareRISC-V Summit 20192019-12-09
Adds concrete instructions and shows measured wins: min/max gave 4× speedup on an inner HMMER Viterbi loop by removing a branch, reference Verilog cores report…
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