Devan Sharma
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| title | conference | date |
|---|---|---|
| Leveraging the RISC-V Efficient Trace (E-Trace) Standard | RISC-V at embedded world 2024 | 2024-04-09 |
Describes a compact encoding that reports start address and only branch outcomes and indirect targets so instruction flow is reconstructed without logging… | ||
| Boost SoC Debug with Smart Monitors and Embedded Software | RISC-V at embedded world 2024 | 2024-04-09 |
Shows embedding a suite of RDL monitors (including a RISC‑V enhanced trace encoder offering cycle-accurate instruction trace) and using a bus monitor to… | ||
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