David Vodák
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| title | conference | date |
|---|---|---|
| Monitoring 400G Traffic in DPDK Using FPGA-Based SmartNIC with RTE Flow | DPDK Summit APAC 2024 | 2024-07-09 |
Cesnet builds a 400G FPGA-based SmartNIC around an Intel Agilex 7 on PCIe Gen4/5, implements an FPGA pipeline that processes four frames per clock to mark… | ||
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