~/conference

DPDK Summit APAC 2024

date:2024-07-09..2024-07-10
location:-- online --
series:DPDK Summit APAC · one edition

The DPDK Summit APAC is a community event designed for software developers who contribute or use DPDK.

titleauthorlength
Welcome & Opening RemarksThomas Monjalon15m
Project history and concrete asks: DPDK starts in 2010 and joins the Linux Foundation after the dpdk.org website launched, contributors include Intel, Marvell…
Organiser at Ballroom 1 (Level 7) on
Introducing UACCE Bus of DPDKFeng Chengwen35m
UACCE adds SVA between accelerators and processes and is upstreamed in the Linux kernel (since 5.7) and DPDK 24.03, letting compressors, crypto, DMA and…
Talk at Ballroom 1 (Level 7) on
ZXDH DPU Adapter and It's ApplicationLijie Shan, Wang Junlong30m
ZTE submits a DPDK/SPDK driver for an ASIC-based DPU that exposes a programmable packet pipeline and broad hardware offloads for networking, storage, crypto…
Talk at Ballroom 1 (Level 7) on
Libtpa IntroductionYuanhan Liu01h 07m
Libtpa is an open source DPDK‑based userspace TCP stack that runs alongside the Linux kernel by steering flows with NIC rules (no virtual NIC middleman)…
Talk at Ballroom 1 (Level 7) on
Telecom Packet Processing and Correlation Engine Using DPDKIlan Raman38m
A DPDK-based 5G packet processing and correlation engine extracts metadata from N11, N4, N3, S1-U and S11, uses DPDK mbuf APIs for header stripping and…
Talk at Ballroom 1 (Level 7) on
Cryptodev and Security Library Updates in DPDKAkhil Goyal, Anoob Joseph36m
DPDK adds concrete crypto and protocol offloads: MACsec offload with an L2 forward example hitting line rate on Marvell CN10K, TLS/DTLS record processing…
Talk at Ballroom 1 (Level 7) on
Unified Representor with Large Scale PortsSuanming Mou15m
Disables per-VF/SF software representors and instead routes miss packets into a single uplink proxy representor, with the hardware writing the origin port into…
Talk at Ballroom 1 (Level 7) on
Troubleshooting Low Latency Application on CNF DeploymentVipin Varghese, Sivaprasad Tummala34m
Containers cause measurable regressions: throughput drops (50 G → 48 G) and tail latency climbs (60 µs typical to 75–150 µs) when a second instance is added…
Talk at Ballroom 1 (Level 7) on
Suggestions to Enhance DPDK to Enable Migration of User Space Networking Applications to DPDKVivek Gupta52m
Proposes adding a reusable DPDK glue layer that gives user-space apps connection hooks, netlink state sync, zero-copy handoff at L2–L4 boundaries, and optional…
Talk at Ballroom 1 (Level 7) on
GRO Library EnhancementsKumara Parameshwaran Rathinavel16m
Claims a hash-based 5-tuple lookup replaces iterative table scans and cuts RT gr_reassemble CPU from ~30% to ~18% at 32 flows and from ~33% to ~15% at 64 flows…
Talk on
Closing RemarksNathan Southern06m
Conference runs as the first APAC event with 63 total attendees (30 in person, 33 online), chosen in Thailand to avoid visa friction and test regional demand…
Organiser at Ballroom 1 (Level 7) on
Welcome BackPrasun Kapoor05m
Asia Pacific attendance concentrates contributors from India and China and the UNH lab now runs the Marvell cn10k DPU with DTS results for L2 forwarding, TSO…
Organiser at Ballroom 1 (Level 7) on
PDCP Packet Processing Library in DPDK - LibpdcpAnoob Joseph, Akhil Goyal54m
Libpdcp implements PDCP datapath handling and partial crypto offload so applications get a single API surface while using rte_cryptodev & rte_security for…
Talk at Ballroom 1 (Level 7) on
Coupling Eventdev Usage with Traffic Metering & Policing (QoS)Sachin Saxena, Apeksha Gupta34m
Customer needs Rx scheduling after RFC-2698 metering and policing with only a single-lcore dequeue while receiving packets in strict priority ordering. The…
Talk at Ballroom 1 (Level 7) on
Refactor Power Library for Vendor Agnostic Uncore APIsSivaprasad Tummala, Vipin Varghese27m
Refactors the DPDK power library into a thin core plus pluggable drivers model that lets per-vendor user-space drivers register with power library and be…
Talk at Ballroom 1 (Level 7) on
Q&A with the Governing Board & Technical BoardWang Yong, Thomas Monjalon, Jerin Jacob27m
Technical process and concrete rules are the focus not fluffy promises: a 11-member technical board meets every two weeks for one hour with a rotating chair…
Talk at Ballroom 1 (Level 7) on
Rte_flow Match with Comparison ResultSuanming Mou20m
Adds an RTE_FLOW compare item that matches fields with operators (=, !=, <, <=, >, >=) against another field or an immediate value, implemented in the template…
Talk at Ballroom 1 (Level 7) on
DPDK PMD Live UpgradeRongwei Liu25m
Adds an API that lets a new mlx5 PMD start in active/standby mode so flow rules and configs can be copied while the old PMD still forwards traffic, then flip…
Talk at Ballroom 1 (Level 7) on
Monitoring 400G Traffic in DPDK Using FPGA-Based SmartNIC with RTE FlowDavid Vodák22m
Cesnet builds a 400G FPGA-based SmartNIC around an Intel Agilex 7 on PCIe Gen4/5, implements an FPGA pipeline that processes four frames per clock to mark…
Talk at Ballroom 1 (Level 7) on
Lessons Learnt from Reusing QDMA NIC to Base Band PMDVipin Varghese, Sivaprasad Tummala43m
Project reuses AMD Xilinx QDMA NIC PMD as a BBDEV front end and wires RTL LDPC encode/decode engines into a short‑circuited RX/TX path. Early prototype runs at…
Talk at Ballroom 1 (Level 7) on
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