Dan Ruelas-Petrisko
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| title | conference | date |
|---|---|---|
| bsg_pearls: Effortlessly Synthesizable Building Blocks That Work Right Out of the Shell | Latch-Up 2025 | 2025-05-02 |
A library of mid-level, silicon‑proven modules (clock generator, delay line, SDR/DDR/LPDDR links, LPDDR controller) ships with SystemVerilog, synthesizable… | ||
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