Safe, Secure and Reliable Computing with the NOEL-V Processor
summary
De-RISC delivers a working NOEL-V on FPGA platform: a 4-core RV64GCH system with GPL/commercial cores, H-extension hypervisor support, PMPU/IOMMU isolation, and bitstreams for Xilinx and Microsemi boards. Every memory region, caches and register file use ECC with a hardware scrubber; radiation tests are published. A low-interference, four-strip interconnect creates isolated data lanes. Follow-up moves to ASIC: STM 28nm FD-SOI target, ~1 GHz projected and an octa-core family design in progress.
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