A Tale of Shared Memory Concurrency in Programming Languages
summary
A concise history of shared‑memory models that shows why language semantics keep changing: concrete example where the outcome a=b=1 outcome on ARM/Power is allowed by weak hardware but disallowed on x86 until compiler reorderings reintroduce it; the claim that DRF-style rules fail in practice; evidence that Java and C++11 models had out-of-thin-air behaviors and broken guarantees; survey of fixes (RC11, promising, weak event structures) and open problems for CPU–GPU heterogeneous shared memory.
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chapters (14)
- 0:00Shared memory concurrency intro
- 2:13Concurrency fundamentals
- 4:21Hardware relaxed memory
- 7:09Compiler optimizations & weak memory
- 9:00Language concurrency models
- 11:54Concurrency semantics goals
- 13:40Data-race freedom origins
- 16:50Java & C++ memory challenges
- 18:17C++11 concurrency model
- 20:45Weak memory evolution
- 22:57Out-of-thin-air in C++
- 24:25GPU & heterogeneous memory
- 26:10Research challenges & questions
- 26:55Q&A
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