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Stellar: A DSL to Build and Explore Sparse Accelerators

Talkat PLARCH 2023 · on Saturday, 2023-06-17· [web-performance]
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Stellar is a DSL that decouples function, dataflow, sparse formats and load‑balancing to automatically synthesize sparse accelerators and generates Verilog and programming stacks. It models CSR/CSC and Gustafson vs outer‑product flows and can predict output‑merger sizes differing by up to an order of magnitude from just the sparsity descriptions. Compiler output integrates with Chisel/Chipyard, emits RTL and 3D visualizations; dense designs match hand‑tuned performance but currently cost about 30% more area, while sparse RTL is functional but still being optimized.

AI-written summary · about

  1. 0:00Introduction
  2. 0:31Why is a DSL needed
  3. 1:18Existing taxonomies
  4. 1:51Spacetime transformations
  5. 2:18Spacetime transform
  6. 2:33Output stationary accelerators
  7. 2:58Spacetime transforms
  8. 5:03Sparse data formats
  9. 6:36Sparse
  10. 7:03Question
  11. 7:36Goals
  12. 7:46Functional Behavior
  13. 8:01Matrix Multiplication
  14. 8:45Complex Data Dependents
  15. 10:38Gamma
  16. 12:05Automatic sparsity
  17. 12:31Finegrained block sparsity
  18. 13:00Spatial array example
  19. 14:37Log Modules
  20. 14:52Sparse Accelerators
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