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Fastware

Talkat NDC TechTown 2017 · 2017-10-17..10-20· [software-architecture]
slides:none on file

Argues that exposing CPU instruction-level parallelism in serial code—by cutting data dependencies, using precomputed powers of ten, replacing multiplies with adds, and using an unsigned modular subtraction check—speeds ASCII-to-integer conversion. Implements a 4× unrolled loop, compares against libc and Boost lexical_cast, and publishes code in a Facebook GitHub library. Measures show about 3.4× speedup (falling toward ~2× on long numbers), with smaller numbers gaining most and tiny inputs sometimes slower.

AI-written summary · about

  1. 0:00Intro
  2. 1:41ALU
  3. 4:20Parallelism
  4. 7:11Data Dependencies
  5. 8:16Cookie Crumbles
  6. 12:22Inlined Math
  7. 16:17Power of 10
  8. 20:41Baseline
  9. 25:28Random IDs
  10. 25:41Strength Reduction
  11. 28:27Parallel Execution
  12. 30:21Table Lookup
  13. 31:43Modular Subtraction
  14. 40:06Unrolling
  15. 42:24Optimization
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