Computational model and algorithms for tensor core units
summary
Defines a simple TCU model (m,l): a RAM plus one tensor core that performs multiply‑accumulate on an n×√m tall matrix times a √m×√m square matrix (no min‑plus, multiply‑accumulate only), with activation latency l and no CPU–TCU concurrency. Shows straightforward rewrites: dense matmul gets ≈√m speedup, Strassen/fast MM base cases use TCUs, FFT in O(n log n / log m + n·l/m), polynomial multiply via FFT, and stencil evolution via preprocessed S^t; no implementation yet and multi‑TCU/precision issues remain.
AI-written summary · about
chapters (19)
- 0:00Tensor core units research
- 1:08Why tensor core units
- 2:41Algorithms beyond deep learning
- 3:25TCU computational model
- 5:44TCU hardware model
- 6:25TCU model definition
- 7:57Large dense matrix multiplication
- 10:25Fast dense matrix multiply
- 12:37Gaussian elimination & graph algorithms
- 13:40Shortest distances limitations
- 14:02Integer multiplication via polynomials
- 15:28Discrete Fourier transform
- 20:29FFT algorithm adaptation
- 23:25Polynomial multiply via FFT
- 26:16Stencil computations
- 30:17Periodic stencil via FFT
- 32:45Theoretical speedup & memory
- 33:05Open questions & future
- 34:10Summary
related talks
19mTask-Based Tensor Computations on Modern GPUs
18mCompiling Strassen-like Matrix Multiplication Algorithms to Fast CUDA Kernels
18mTC-GNN: Bridging Sparse GNN Computation and Dense Tensor Cores on GPUs
17mA Sparse Iteration Space Transformation Framework for Sparse Tensor Algebra
11mDemo: Running Transformers on Semidynamic's "All-In-One" Vector and Tensor Unit
20mCompiling Structured Tensor Algebra
28mFunctional Sparse Tensor Compilation
01h 00mThe Shape of Things to Come