~/talk

Accelerate Software and Hardware Co-Simulation Using K8s and QEMU

name:Pu Wang
links:none on file
slides:none on file

Shows an open-source workflow that runs software/hardware co-simulation by connecting QEMU and Verilator via LibSystemCTLM-SoC (socket or shared-memory) so software in QEMU can talk to hardware modeled by Verilator. Scales throughput by running QEMU+Verilator together in Kubernetes Pods to run many co-simulation jobs in parallel. Also describes using real PCIe FPGAs to speed simulations, extending the Kubernetes scheduler to assign FPGA resources and loading bitstreams via Xilinx RunTime.

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