Optimizing Systems for Byte-Addressable NVM by Reducing Bit Flipping

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" summary

This work defines bit flips, not write counts, as the optimization target for byte-addressable NVM and shows that reducing writes can increase flips. It implements xor linked lists, xor red-black trees, and pointer-distance hash chains, modified gem5 to count bit flips at the memory controller, and measures allocator and stack-placement effects. Results show up to 3.56× reduction in bits flipped versus standard implementations with negligible runtime overhead and no hardware changes beyond controllers that skip unchanged bits.

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" chapters (19)

1. 0:00Introduction
2. 0:43ByteAddressable NVM
3. 4:00Do we do it in software or hardware
4. 4:52Is this something we can do
5. 5:58Data Structures
6. 7:55XOR Linked Lists
7. 10:03Least Significant Bit
8. 10:56RedBlack Tree
9. 12:06Evaluation Criteria
10. 13:29Prior Work
11. 14:45Warmup Results
12. 16:04XOR Linked List Results
13. 17:21Hash Table Results
14. 18:12Red Black Trees Results
15. 19:48Layer 2 Cache Effects
16. 21:43Hash Table Performance
17. 21:58Conclusion
18. 23:00Real Hardware
19. 23:24Questions