Marteen Boersma
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| title | conference | date |
|---|---|---|
| Experience with Chisel in designing a scalable, manufacturable cache directory | ORConf 2025 | 2025-09-12 |
Implements a synthesizable pipeline cache directory for multi‑CPU coherency using Chisel and generating FIRRTL, verifies with Python UVM over cocotb using both… | ||
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