Luca Bertaccini
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| title | conference | date |
|---|---|---|
| From an Open-Source ISA to Open-Source HW to Open-Source Silicon | Latch-Up 2024 | 2024-04-19 |
PULP describes a working pipeline from an RISC-V ISA to open RTL IPs to a full chip built with IHP 130 nm open PDK and open-source EDA (yosys and OpenROAD)… | ||
| MiniFloat-NN: A RISC-V ISA Extension for Low-Precision NN Training | RISC-V Summit 2022 | 2022-12-13 |
Extension implements widening sum-of-dot-products and three-term additions in a parameterized FP unit integrated into an open-source RISC‑V FPU and Snitch… | ||
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