Daniel Gruss
where else to find them
x:lavados
what they talk about
where they keep going back
- RuhrSec3 editions2017–2025
- Black Hat Asia2 editions2020–2022
all 6 in the filters
on a stage with
all 18 in the filters
who talks about the same things
- Michael Schwarz25 talks
- Anders Fogh5 talks
- Andreas Kogler4 talks
- Herbert Bos11 talks
- Daniel Weber5 talks
- Patricia Aas32 talks
| title | conference | date |
|---|---|---|
| Keynote – Every Threat Model is Wrong | RuhrSec 2025 | 2025-02-20 |
RuhrSec is the annual English speaking IT security conference with cutting-edge security talks by renowned experts. RuhrSec is organized by Hackmanit.
🔽 More… | ||
| SQUIP or Why We Need to Study Processors Like Nature | RuhrSec 2023 | 2023-05-11 |
Introduces SQUIP as a scheduler-queue contention side channel that forces pipeline stalls by flooding scheduler queues with dependent multiplies and slow… | ||
| Remote Memory-Deduplication Attacks | Black Hat Asia 2022 | 2022-05-10 |
Remote memory‑deduplication is practical over the Internet without running attacker code: sending and overwriting pages via memcache d (tested on KVM on Ubuntu… | ||
| Secure Cache Designs: State of the Art and ... | RuhrSec Day 2022 | 2022-05-05 |
Overview of concrete results and prototypes assessing secure cache designs with numbers and attacks. Shows that Prime‑prune‑probe reduces profiling time by… | ||
| Complexity Killed Security | Black Hat Asia 2020 | 2020-09-29 |
Shows concrete results: reverse‑engineered DRAM mappings via timing side‑channel and used rowhammer techniques to flip bits across rows; demonstrates that MSR… | ||
| Page Cache Attacks: Microarchitectural Attacks on Flawless Hardware | Black Hat Asia 2020 | 2020-09-29 |
Operating-system page cache acts as a software cache and yields non-destructive probes via APIs like mincore and QueryWorkingSet, enabling timing side channels… | ||
| Strong and Efficient Cache Side-Channel Protection... | 26th USENIX Security Symposium (USENIX Security '17) | 2017-08-16 |
Cloak uses Intel TSX to pin sensitive code and data into L1/L3 by preloading and executing every cache line (compiler-inserted return opcodes) and a C++… | ||
| Rowhammer Attacks: A Walkthrough Guide | RuhrSec 2017 | 2017-05-04 |
Walks through reproducible Rowhammer primitives, concrete tools and results: native double‑sided hammering and Rowhammer.js exploit JavaScript; DRAM… | ||
| ARMageddon: Cache Attacks on Mobile Devices | USENIX Security '16 | 2016-08-10 |
Implements Prime+Probe and Flush+Reload (and Evict+Reload, Flush+Flush) on unrooted ARM phones, using a tuned eviction loop to replace missing flush… | ||
| DRAMA: Exploiting DRAM Addressing for Cross-CPU Attacks | USENIX Security '16 | 2016-08-10 |
Reverse engineers DRAM address maps with two methods: physical probing with an oscilloscope on chip‑select and bank pins and a fully automated timing-based… | ||
| Using Undocumented CPU Behavior to See Into Kernel Mode and Break KASLR in the Process | Black Hat USA 2016 | 2016-08-03 |
An unprivileged prefetch instruction timing side channel reliably leaks where kernel pages are mapped and often reveals driver locations, breaking KASLR… | ||
| nothing matches | ||