Dan R. K. Ports
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| title | conference | date |
|---|---|---|
| Beaver: Practical Partial Snapshots for Distributed Cloud Services | 18th USENIX Symposium on Operating Systems Design and Implementation (OSDI '24) | 2024-07-10 |
Beaver presents a practical partial snapshot protocol that captures causally consistent states when only a subset of machines participates, by instrumenting… | ||
| Hydra: Serialization-Free Network Ordering for Strongly Consistent Distributed Applications | NSDI 2023 | 2023-04-17 |
Hydra implements a distributed network sequencer primitive that combines per-sequencer sequence counters with loosely synchronized physical timestamps to avoid… | ||
| NetVRM: Virtual Register Memory for Programmable Networks | 19th USENIX Symposium on Networked Systems Design and Implementation (NSDI '22) | 2022-04-04 |
NetVRM provides a virtual register memory abstraction plus a P4VRM compiler that merges multiple P4 programs so on-chip register regions are remapped at… | ||
| SwiSh: Distributed Shared State Abstractions for Programmable Switches | 19th USENIX Symposium on Networked Systems Design and Implementation (NSDI '22) | 2022-04-04 |
SwiSh provides a data‑plane shared‑state layer that runs on P4/Tofino switches and implements three replication protocols (strong, eventual, and Strong… | ||
| Unlocking the Power of Inline Floating-Point Operations on Programmable Switches | 19th USENIX Symposium on Networked Systems Design and Implementation (NSDI '22) | 2022-04-04 |
Proposes FPISA, a compact floating-point representation and pipeline methods, implements it on Intel Tofino then identifies throughput and accuracy limits, and… | ||
| Scaling Distributed Machine Learning with In-Network Aggregation | NSDI ’21 | 2021-04-12 |
Implements SwitchML: a co-designed system that pushes aggregation into a programmable switch dataplane to reduce model-update volume and offload the all-reduce… | ||
| Multitenancy for Fast and Programmable Networks in the Cloud | HotCloud '20 | 2020-07-13 |
Claims that a hybrid compile-time linker plus a runtime stateful-memory allocator lets multiple tenant P4 programs share a Barefoot Tofino ASIC with low… | ||
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