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Ashish Panwar

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GraCE: Unlocking CUDA Graphs with Compiler Support for ML Workloads20th USENIX Symposium on Operating Systems Design and Implementation (OSDI '26)2026-07-13
GraCE is a compiler framework built atop PyTorch2 that unlocks CUDA Graphs for 25 ML workloads (TorchBench, HuggingFace, TIMM) and requires no code changes. It…
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EMD: Fair and Efficient Dynamic Memory De-bloating of Transparent Huge PagesISMM 20252025-06-17
EMD is a kernel-level system for dynamic de-bloating of transparent huge pages that breaks huge pages into base pages, deduplicates zero-filled bases, and…
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Taming Throughput-Latency Tradeoff in LLM Inference with Sarathi-Serve18th USENIX Symposium on Operating Systems Design and Implementation (OSDI '24)2024-07-10
Describes a scheduler that splits large prefill passes into chunked-prefills and constructs stall-free schedules that mix those chunks with decode batches to…
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