~/conference

The Future of Weak Memory 2024

date:2024-01-15
location:London, United Kingdom
series:The Future of Weak Memory · one edition

programming language researchers, compiler engineers, systems architects, hardware architects, operating system developers, gpu engineers, formal verification and tooling engineers

memory persistency models; compiler testing for weak memory; C++ atomics and standardization; semantic dependency preservation; out-of-thin-air behaviours; reproducible memory-model tooling; heterogeneous weak-memory ISAs; NVM persistency validation; load-store order preservation; write-buffer and instruction-cache flushes; RISC-V memory mapping issues; GPU axiomatic memory models

titleauthorlength
WelcomeJohn Wickerson, Azalea Raad, Brijesh Dongol, Mark Batty, Peter Sewell05m
Program opens by defining weak versus strong memory and lists concrete agenda items: empirical validation of memory persistency models, tooling for checking…
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Some things I wish I hadn’t seenMatthew J. Parkinson21m
Finds real code patterns in the .NET runtime and a Microsoft project that use flush_process_write_buffers as an intentionally heavyweight IPI to restore…
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Chasing Unicorns and Not Losing Hope in Validating Weak Memory Persistency Model...Vasileios Klimis21m
A practical method to validate NVM persistency on real machines: hardware bus interception with a SoCal DDR detective fails on x86 because the persistent…
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How Do We Know That Weak Memory Matters?Mike Dodds23m
Argues current evidence is weak that weak memory causes widespread system or security failures, citing only a single Rust Belt CVE and few reproducible…
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Weak Memory Demands Model-based Compiler TestingLuke Geeson21m
Claim: hardware is using RV 8.2a with Large Systems Extension behaviors more aggressively, so compiled C/C++ can exhibit outcomes not allowed by the C++ model…
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On the need for available, functional, and reusable memory modelsHernán Ponce de León25m
Paper data vanishes after a PhD student leaves, so reproducibility fails; experiments and examples claim conformance but links are dead, so demand is permanent…
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What we learned from C++ atomics and memory model standardizationHans-J. Boehm22m
C++ codebases show atomics as common as mutexes, with many using weakly ordered atomics rather than clever lock‑free structures; measurements on ARM cores show…
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Why Languages Should Preserve Load-Store OrderStephen Dolan22m
Argues programming-language memory models should ban load-store reordering and preserve load-before-store so induction and pointer-alias reasoning remain…
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Compilers should get over themselves and respect semantic dependencies!Paul E. McKenney22m
Argues that C/C++ compilers must preserve meaningful runtime dataflow because no real system exhibits OOTA and physics plus hardware practice constrain…
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A case against semantic dependenciesOri Lahav22m
Argues that the proposed three-step C/C++ fix—derive a global semantic dependency from all candidate executions then apply RC11 consistency—fails on concrete…
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What Compilers desire from Weak Memory SemanticsAkshay Gopalakrishnan19m
Claims a method to derive weaker memory models that preserve SC-safe optimizations so compilers need not be reproved for every model. Demonstrates concrete…
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Programmers love mind-bogglingly complicated weak memory modelsSimon Cooksey19m
Nvidia documents a concrete, unusually weak GPU memory model that adds proxies and enforces proxy preserved program order so that cycles in pppo and fr are…
Talk
Evolving Weak Memory Models for Evolving ArchitecturesReese Levine17m
Empirical litmus testing shows load buffering visible on most GPUs with observed rates from ~0.001% (Intel) to >1% (AMD); a methodology mutates candidate…
Talk
In-order execution nails every weak memory behaviorChung-Kil Hur22m
Claims that an in-order, view-based model (an operational V‑IC1 semantics) captures all weak‑memory behaviors typically attributed to out‑of‑order models and…
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System-level weak memory models: The need for formalisation, ISA semantics integ...Thibaut Pérami19m
Argues for fully formalised system-level weak memory models and presents an executable Coq/ROCK-style library that composes a full instruction-set semantics…
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Relaxed systems semantics and how we (hope to) reason above itBen Simner20m
Plan to verify a production Google Pixel hypervisor against a faithful ARM semantics that currently lacks a unified model for instruction fetch, cache…
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Heterogeneous concurrency -- a new frontier for weak memorySoham Chakraborty18m
Claims a compound memory model that composes x86 and PTX semantics, gives both an axiomatic formulation and a POP‑style operational model, and proves the usual…
Talk
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