Efficient Enumeration Algorithms via Circuits
summary
Presents concrete algorithms that enumerate satisfying assignments of structured set-circuits (d-DNNF variants) with linear preprocessing and output-linear delay (constant delay when answers have bounded size), plus a conversion route from Boolean d-DNNFs if smoothed; supports incremental relabeling updates in logarithmic time (some update claims currently conditional on a revised proof); applies to MSO on trees, document-spanner regex captures with preprocessing and delay polynomial in the automaton, and to unambiguous annotated grammars (cubic preprocessing).
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chapters (8)
- 0:00Introduction to the topic
- 2:48Enumeration and complexity
- 5:29Knowledge compilation
- 7:07Set circuit formalism
- 12:17Main enumeration results
- 15:30Proof and algorithmic details
- 28:21Applications and extensions
- 37:16Future work and discussion
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