NVIDIA Confidential Computing Attestation for Next-Generation AI
summary
NVIDIA expands attestation from a single Hopper GPU (2024) and protected PCIe to rack-scale Vera Rubin NVL72, proving multi-node attestation of dozens of GPUs, CPUs and NVSwitches as a unified trusted system; a high‑availability attestation service with RIMs, OCSP revocation checks and one‑click tokens already supports cloud partners. Work focuses on SPDM, embedding CoRIM + CoEV mapping and DICE TCB info to eliminate handwritten verifiers, add fleet intelligence telemetry via Enras, and mitigate relay/substitution attacks across encrypted NVLink fabrics.
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chapters (10)
- 0:00NVIDIA confidential computing intro
- 1:04Hopper to Blackwell GPUs
- 3:12Attestation services challenges
- 5:39Vera Rubin rack-scale CC
- 7:46Scaling attestation multi-node
- 9:30Standards for scalable attestation
- 12:00Co-RIM and Co-EV in Vera Rubin
- 13:29Fleet attestation and intelligence
- 15:41Future roadmap and standards
- 16:23Industry adoption progress
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