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Processing in Storage Class Memory

linkedin:joel-nider
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Position: processing-in-memory becomes integral to storage-class memory to cut memory-bandwidth and CPU usage by running simple, parallel tasks inside SCM. Implementation uses UPMEM DDR4 DIMMs with one DPU per 64 MB, 64 KB private SRAM and DMA-driven loads into an interleaved bank layout. Measured raw move of 36 GB in 0.16 s (~250 GB/s) across 576 DPUs (9 ranks × 64 DPUs); snappy decompression shows up to 4.5× speedup versus host CPU for large files, with smaller files losing benefit. Proposals: data-triggered functions, concurrent host/DPU access, mixed memory.

AI-written summary · about

  1. 0:00Intro
  2. 1:19Storage Latency Is Decreasing
  3. 3:20Benefits of PIM on SCM
  4. 6:21PIM Design Points
  5. 7:45UPMEM Architecture and Limitations
  6. 8:59Interleaved Multithreading
  7. 11:05Use Case: Compression
  8. 13:54Future Directions
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