AI Infra @Scale 2023
as the organisers put it
Discover the latest solutions in machine learning scalability at AI @Scale 2023 conference. Register now.
who it's for
machine learning researchers, infrastructure engineers, data center architects, machine learning engineers, ai hardware engineers, developer tools engineers
topics
AI research supercluster; liquid-to-chip cooling; torch.compile graph compilation; InfiniBand non-oversubscribed fabric; NVIDIA A100 80GB clusters; Airstore shared flash storage; custom inference accelerators; MSVP video accelerator SoC; code completion models for IDEs; Knife DSL and compiler pipelines; rack power distribution optimization; allreduce bandwidth optimization
| title | author | length |
|---|---|---|
| Opening Remarks | Santosh Janardhan | 05m |
AI shifts the infrastructure stack to an AI-first model: designing and custom-building data centers, owning kernel, silicon and software stack, and using… | ||
| Research SuperCluster(RSC): Accelerating AI Research at Scale | Scott Hanselman, Kalyan | 22m |
A custom cluster delivers concrete hardware and measured gains: a homogeneous fabric with about 48,000 InfiniBand links and no oversubscription, servers with… | ||
| Next-Generation Data Center Design | Alan Duong | 16m |
New data center design targets 4X scale by using fewer, denser racks, eliminating the low‑voltage switchgear bottleneck and pushing power closer to racks to… | ||
| PyTorch 2.0 | Peng Wu | 13m |
PyTorch 2.0 (released March 15, 2023) delivers graph-mode speed without losing the eager UX by shipping a one‑liner torch.compile that often yields 30% gains… | ||
| MTIA: Meta's First Generation of AI Accelerators | Roman Levenstein, Amin Firoozshahian, Joel Coburn, Olivia Wu | 21m |
Meta builds a 317 mm² die in 70 nanometer technology that runs at 800 MHz with a 25 watt power budget and delivers 102 TOPS int8 or 51.2 TFLOPS fp16, organized… | ||
| MSVP: Meta's Scalable Video Processor | Harikrishna Reddy, Ioannis Katsavounidis | 11m |
MSVP is a server-grade video accelerator that processes up to 1 billion pixels per second while consuming less than 10 W, implemented as a 100 mm² 7 nm SoC… | ||
| Gen AI-Assisted Code Authoring | Michael Bolin | 11m |
Meta's Code Compose uses 1.3B and 6.7B models derived from FAIR's encoder, fine-tuned on first‑party Python, Hack and Flow code and supplemented with… | ||
| FIRESIDE CHAT: The Future of AI Infra: The Opportunities and Challenges That Await Us On Our Journey | Irina Kofman, Alexis Björlin, Aparna Ramani, Kim Hazelwood, Rachel Peterson | 24m |
Meta describes building next‑generation data centers with liquid cooling because AI chips draw >5x the power of CPU servers, and it already runs a… | ||
| Closing Remarks | Santosh Janardhan | 03m |
Company reports AI infrastructure investments are converting into new experiences across its app family and predicts training and inference demand ramps up… | ||
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